Semiconductor device and method for fabricating the same

ABSTRACT

The semiconductor device comprises a pair of impurity diffused regions formed in a silicon substrate  10,  spaced from each other, and a gate electrode  26  formed above the silicon substrate  10  between the pair of impurity diffused regions  38  intervening a gate insulation film  12  therebetween. The gate electrode  26  is formed of a polycrystalline silicon film  16  formed on the gate insulation film  12,  a polycrystalline silicon film  30  formed on the polycrystalline silicon film  16  and having crystal grain boundaries discontinuous to the polycrystalline silicon film  16,  a metal nitride film  20  formed on the polycrystalline silicon film  30,  and a metal film  22  formed on the barrier metal film  20.  Whereby diffusion of the boron from the first polycrystalline silicon film  16  toward the metal nitride film  20  can be decreased. Thus, depletion of the gate electrode  26  can be suppressed.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a semiconductor device and amethod for fabricating the semiconductor device, more specifically to asemiconductor device including gate electrodes of a polymetal structurehaving laid polycrystalline silicon films and metal films, and a methodfor fabricating the same.

[0002] Conventionally, the gate electrodes of MOSFETs have been formedof single polycrystalline silicon layered structures owing to thethermal stability, the compatibility of polycrystalline silicon withsilicon of the substrates in its MOS characteristics, etc. Presently,the so-called polycide structure, which is formed of a silicide filmdeposited on a polycrystalline silicon film, is dominantly used for theend of decreasing sheet resistance of the gate electrodes whileutilizing the above-described advantages of polycrystalline silicon.Logic devices and memory devices now on market have gate electrodestructures of the polycide structure.

[0003] The gate electrodes of the MOSFETs of the current logic devicesgenerally have layered structures of titanium silicide or cobaltsilicide, and polycrystalline silicon. On the other hand, the gateelectrodes of the MOSFETs of memory devices are formed of layeredstructures of tungsten silicide and polycrystalline silicon. This isbecause the logic device require no high-temperature and long-time heatprocessing after the gate electrodes have been formed, so that titaniumsilicide and cobalt silicide, which have low heat resistance but cansufficiently lower sheet resistance, are applicable to the gateelectrode of the logic device for high-speed operation. On the otherhand, the memory devices require the step of forming capacitors, whichrequire high-temperature and long-time heat processing after the gateelectrodes have been formed, so that tungsten silicide, which has highersheet resistance than titanium silicide and cobalt silicide, but issuperior to titanium silicide and cobalt silicide in heat resistance, isapplicable to the gate electrode of the memory device compatibly withsteps of forming the memory elements.

[0004] It is one reason for applying tungsten silicide to the memorydevices that the peripheral circuits of the currently fabricated memorydevices are CMOS circuits of the so-called single gates which includethe gate electrodes of the N-channel transistors and the gate electrodesof the P-channel transistors formed of N polycrystalline silicon. Thatis, the memory devices do not require high performance of the peripheralcircuits, as do the logic devices, and accordingly it has not been muchnecessary to use the CMOS circuits of the so-called dual gates whichinclude the gate electrodes of the N-channel transistors formed of N⁺polycrystalline silicon, and the gate electrodes of the P-channeltransistors formed of P polycrystalline silicon. Furthermore,diffusivity of dopants in tungsten silicide are several orders ofmagnitude higher than that in polycrystalline silicon, which has made itdifficult to apply tungsten silicide to the CMOS circuits having thedual gates.

[0005] Recently, dual-gate CMOS technology is required even inperipheral circuits of memory devices in order to achieve highperformance. However, high-performance circuits cannot be achieved inmemory devices by using current dual-gate technology for LOGIC devicesbecause of the poor thermal stability and severe inter-diffusion of gatedopants between P⁺ gate and N⁺ gate.

[0006] Presently, the so-called polymetal (polycrystallinesilicon-metal) gate structures having a refractory metal andpolycrystalline silicon laid on each other are considered. The polymetalstructure has on polycrystalline silicon a layer of a refractory metalhaving higher heat resistance and lower sheet resistance than silicide,and can simultaneously satisfy low sheet resistance required by thelogic devices, and heat resistance required by the memory devices.

[0007] A MOS transistor having the typical polymetal gate structure willbe explained with reference to FIG. 12.

[0008] A gate electrode 104 is formed on a silicon substrate 100intervening a gate insulation film 102 therebetween. The gate electrode104 is formed of a layered structure of a polycrystalline silicon film106 formed on the gate insulation film 102, a WN (tungsten nitride) film108 formed on the polycrystalline silicon film 106 and a W (tungsten)film formed on the WN film 108. The WN film 108 is a barrier metal forpreventing the polycrystalline silicon film 106 and the W film 110 fromreacting with each other to thereby form tungsten silicide, which hashigh resistance. A cap film 112 of silicon nitride film is formed on thegate electrode 104. A silicon oxide film 114 is formed on the side wallsof the polycrystalline silicon film 106. A sidewall insulation film 116is formed on the side walls of the gate electrode 104. A source/draindiffused layer 122 formed of a low-concentration diffused region 118 anda high-concentration diffused region 120 is formed in the siliconsubstrate on both sides of the gate electrode 104.

[0009] The polymetal gate structure shown in FIG. 12 is much superior inheat resistance and in suppressing interdiffusion of a dopant in thepolycrystalline silicon film 106 in a case that the dual gate structureis adopted, whereby sheet resistance does not increase even afterhigh-temperature and long-time heat processing and a threshold voltageof the transistors of the CMOS circuit does not change.

[0010] In the conventional method for fabricating the semiconductordevice, an amorphous silicon film to be the polycrystalline silicon film106 is deposited, boron is doped in the amorphous silicon film, the WNfilm 108 and the W film 10 are deposited, these laid films are patternedto form the gate electrode 104.

[0011] However, the semiconductor device having the polymetal structurefabricating by the above-described fabrication method often hasdepletion in the gate electrode 104 of the PMOSFET.

[0012] The inventors of the present application have made earneststudies of the depletion in the gate electrode 104 of the PMOSFET andhas found for the first time that the depletion in the gate electrode104 are caused by the fact that boron, a gate dopant of the PMOSFET isabsorbed into the reaction layer between the WN film 108 as the barriermetal and the polycrystalline silicon film 106 to form B—N bonds, whichlowers a boron concentration in the polycrystalline silicon film 106.The depletion in the gate electrode affect characteristics of the MOStransistor, and it is desirable to suppress the depletion as far aspossible.

SUMMARY OF THE INVENTION

[0013] An object of the present invention is to provide a semiconductordevice including a polymetal gate structure of the dual gate, which cansuppress depletion in the gate electrode of a PMOSFET, and a method forfabricating the same.

[0014] The inventors of the present application have made earneststudies of causes of the depletion of the gate electrode 104 of theconventional semiconductor device shown in FIG. 12 and have found forthe first time that the boron absorption of the WN film is due to B—Nbonds formed by boron as a gate dopant being absorbed by the reactionlayer between the WN film 108 as a barrier metal and the polycrystallinesilicon film 106.

[0015]FIG. 13 is a graph of a boron distribution in the gate electrodeof the conventional semiconductor device shown in FIG. 12 measured bysecondary ion mass spectroscopy (SIMS). FIG. 14 shows B1s spectrumpresent on the interface between the WN film and the polycrystallinesilicon film analyzed by X-ray photo-electron spectroscopy (XPS).

[0016] As shown in FIG. 13, boron introduced into the polycrystallinesilicon film 106 is absorbed up by the WN film 108, and a highconcentration of boron is present in the WN film 108. As shown in FIG.14, a peak at the binding energy of 191 eV which corresponds to B—N bondcan be observed at the interface between the WN film and thepolycrystalline silicon film. Based on these results, it is consideredthat boron in the polycrystalline silicon film 106 is absorbed by thereaction layer between the WN film 108 and the polycrystalline siliconfilm 106 to form B—N bonds, whereby a boron concentration in thepolycrystalline silicon film 106 is decreased to thereby depletion ofthe gate electrode 104 occur.

[0017] Then, the inventors of the present application groped for meansfor suppressing the absorption of boron by the reaction layer betweenthe WN film and the polycrystalline silicon film. Resultantly, theyconsidered it effective that a thin silicon film interposed between thepolycrystalline silicon film and the WN film. They have succeeded insuppressing boron absorption of the reaction layer between the WN filmand the polycrystalline silicon film.

[0018] It is considered that diffusion of boron toward the WN film issuppressed by providing silicon film between the polycrystalline siliconfilm and the WN film because native oxide film is formed between thepolycrystalline silicon film and the silicon film. In the process inwhich the silicon film is formed after boron has been introduced intothe polycrystalline silicon film, the wafer is exposed to the airbetween the step of forming the polycrystalline silicon film and thestep of forming the silicon film, and native oxide film is formed on thesurface of the polycrystalline silicon film. Even if a pre-treatment ismade before the following formation of the silicon film, native oxidefilm is formed in the process up to the load of the wafer into a filmforming system. It is difficult to completely remove the native oxidefilm between the polycrystalline silicon film and the silicon film.

[0019] The present invention utilizes the thus-formed native oxide film,so that the native oxide film formed between the polycrystalline siliconfilm and the silicon film suppresses diffusion of boron from thepolycrystalline silicon film toward the silicon film, and accordinglythe boron absorption by the WN film is decreased.

[0020] It is considered that the oxide film intervening between thepolycrystalline silicon film and the silicon film, when too thick,increases contact resistance between the polycrystalline silicon filmand the silicon film, and when too thin, reduces the effect ofsuppressing the diffusion of the boron. Accordingly, a thickness of theoxide film is preferably 0.5-1.5 nm.

[0021] The silicon film intervening between the polycrystalline siliconfilm and the WN film may be polycrystalline silicon film or amorphoussilicon film. Preferably, the silicon film has a thickness of not lessthan about 5 nm. This is because when the silicon film has a thicknessbelow about 5 nm, all the silicon film reacts with the WN film, and thesuppression of the boron diffusion by the native oxide film is notsufficient. On the other hand, when the silicon film intervening betweenthe polycrystalline silicon film and the WN film is too thick, supply ofthe boron from the polycrystalline silicon film to the silicon film isinsufficient, and contact resistance between the silicon film and the WNfilm increases. There is a risk that especially AC characteristics maybe affected. There is also a risk that over-etching of the WN film isstopped by the native oxide film, and the etching for forming the gateelectrode may be complicated. Accordingly, it is preferable that a filmthickness of the silicon film is set to be about 2-20 nm.

[0022]FIG. 1 is a graph of boron distributions in the gate electrodes ofthe Control without silicon film intervening and of the presentinvention (Example 1) with amorphous silicon film intervening measuredby SIMS. For detailed conditions for fabricating the sample of thepresent invention (Example 1) used in this measurement, a firstembodiment which will be described later is referred to. The sample ofthe Control was fabricated under the same fabrication conditions asthose for the first embodiment except that the step of forming theamorphous silicon film is omitted.

[0023] As seen in FIG. 1, in Example 1 of the present invention with theamorphous silicon film (a-Si) intervening, the diffusion of boron towardthe WN film is suppressed in comparison with the Control withoutamorphous silicon film intervening. Thus, in the present invention theboron concentration in the polycrystalline silicon film could be muchincreased.

[0024] In the present invention, a small peak is observed between theamorphous silicon film and the polycrystalline silicon film. This meansthat native oxide film is present in the interface. In other words, asmeans for confirming that the polycrystalline silicon film below thebarrier metal was formed by plural times of deposition, measurement ofboron concentration distribution by SIMS can be used. Oxygen of thenative oxide film may be directly analyzed by SIMS.

[0025] However, in Example 1 shown in FIG. 1, the boron concentrationnear the surface of the silicon substrate is higher in comparison withthat of the Control. This will be because a concentration of borondiffused into the silicon substrate was increased as a boronconcentration near the interface was increased. The diffusion of boroninto the inside of the silicon substrate affects changes of the flatband voltage, i.e., the threshold voltage of a transistor. It ispreferable that the diffusion is suppressed as much as possible.

[0026] The crystal structure of the silicon films in contact with gateinsulator is essential for reducing boron penetration into siliconsubstrate. In the case of polycrystalline silicon, the amount of boronpenetration is smaller than in the case of amorphous silicon. Pleasenote if polycrystalline silicon is used for this structure,amorphization using implantation of heavy ion such as Ge is neededbefore boron implantation, in order to suppress the boron penetrationcaused by channeling. The inventors presume the mechanism of suppressingboron penetration as follows.

[0027] Generally, the grain size of a polycrystalline silicon filmdeposited at the temperatures 600-650° C. is smaller than that of apoly-crystallized amorphous silicon film which is poly-crystallized bythermal processing at the temperatures around 800° C. The crystals inthe former case grow in columns since boron atoms introduced into thepolycrystalline silicon film easily diffuse toward the gate insulationfilm along the column in the grain boundaries. On the other hand,smaller grain size results in larger crystal grain boundary areas.Accordingly, the boron atoms more tend to be taken into the crystalsthan in large grain size polycrystalline silicon film such aspoly-crystallized amorphous silicon film by thermal processing.Accordingly, it is considered that in the small grain polycrystallinesilicon film, boron is diffused in a high concentration near the gateinsulation film, but boron is taken into the polycrystalline silicon ina large quantity, so that a concentration of boron which is diffusedinto the silicon substrate 10 across the gate insulation film 12 can below. It can be presumed based on this view that preferably the basepolycrystalline silicon film has small crystal grain diameters.

[0028] The pre-amorphization of the polycrystalline silicon film is forsuppressing the channeling of boron ions upon the doping. Accordingly,when the ions can be implanted at low energy of, e.g., 13 keV, thepre-amorphization of the polycrystalline silicon film is not essentialbecause the punch-through of boron by the channeling into the inside ofthe silicon substrate can be suppressed.

[0029]FIG. 2 is a graph of boron distributions in the gate electrodes ofa Control in which amorphous silicon film doped with boron ispoly-crystallized to form the polycrystalline silicon film 106, andamorphous silicon film intervenes between the polycrystalline siliconfilm 106 and the WN film 108, and of the present invention (Example 2)in which polycrystalline silicon film is deposited and pre-amorphized,and doped with boron, and the amorphous silicon film intervenes betweenthe polycrystalline silicon film 106 and the WN film 108. For detailedconditions for fabricating the sample of the present invention used inthis measurement, a second embodiment which will be described later isreferred to. The sample of the Control was fabricated under the samefabrication conditions as those for the first embodiment except that thestep of forming the amorphous silicon film is omitted.

[0030] Polycrystalline silicon film is deposited and is pre-amorphizedin place of depositing the amorphous silicon film, whereby, as shown inFIG. 2, a boron concentration in the silicon substrate near theinterface with the gate insulation film can be decreased to be equal tothat of the Control. Accordingly, change of a threshold voltage of atransistor can be suppressed.

[0031] The sample of Example 2 of the present invention shown in FIG. 2has the polycrystalline silicon film of a 100 nm-thick, and thepolycrystalline silicon film is thicker than the 70 nm-thickpolycrystalline silicon film of the Control. However, the effect ofsuppressing the diffusion of boron into the silicon substrate does notresult from decrease of the channeling owing to the increased filmthickness of the polycrystalline silicon film. In comparison of thesample (Example 1 of the present invention in FIG. 1) with boronimplanted in the 70 nm-thick polycrystalline silicon film with thesample (Example 2 of the present invention in FIG. 2) with boronimplanted in the 100 nm-thick polycrystalline silicon film, the latterhas a lower concentration of boron which has punched through into thegate silicon substrate even with a higher boron concentration in thepolycrystalline silicon film near the gate insulation film than that ofthe former. Accordingly, it is considered that the effect of suppressingthe diffusion of boron toward the silicon substrate results from adifference between a state of diffusion of boron in the polycrystallinesilicon film and a state of diffusion of boron in the polycrystallinesilicon film having amorphous silicon poly-crystallized.

[0032]FIG. 3 is a graph of results of C-V measurement of a conventionalMOS capacitor as a Control, and MOS capacitors formed by the presentinvention as Examples 1 and 2. Depletion of the p⁺ polycrystallinesilicon of the gate electrodes occur in negative biased region in FIG.3. Thus, an index for evaluating depletion of a gate electrode can bemeasured accumulation (negative biased region) capacitances on a C-Vcurve. It is judged that depletion of the gate electrode is little as anaccumulation capacitance is higher. The diffusion of boron toward thesilicon substrate can be judged based on an inclination of the C-V curvenear 0 V, and it is judged that as an inclination is blunter, i.e., as aflat band voltage is higher, the diffusion of boron toward the substrateis more.

[0033] As shown, Example 1 including an amorphous silicon filmintervening between a WN film and a polycrystalline silicon film couldhave the increased accumulation capacitances in comparison with theControl and could suppress the diffusion of boron toward the substrateto the substantially equal levels.

[0034]FIG. 4 is a graph of results of measured Id-Vg characteristics ofa conventional PMOSFET as a Control, and PMOSFETs formed by the presentinvention. As seen in the results of FIG. 3, in Example 1 shift of thethreshold voltages is observed, and it can be observed that boron isdiffused toward the silicon substrate. On the other hand, Example 2 ofthe present invention has substantially the same subthresholdcharacteristic as the Control, and it is seen that the diffusion ofboron toward the silicon substrate is suppressed.

[0035] The above-described object is attained by a semiconductor devicecomprising: a pair of impurity diffused regions formed in a siliconsubstrate, spaced from each other; and a gate electrode formed above thesilicon substrate between the pair of impurity diffused regionsintervening a gate insulation film therebetween, the gate electrodebeing formed of a first polycrystalline silicon film formed on the gateinsulation film, a second polycrystalline silicon film formed on thefirst polycrystalline silicon film and having crystal grain boundarieswhich are discontinuous to the first polycrystalline silicon film, and ametal nitride film formed on the second polycrystalline silicon film.

[0036] The above-described object is also attained by a semiconductordevice comprising: a pair of impurity diffused regions formed in asilicon substrate, spaced from each other; and a gate electrode formedabove the silicon substrate between the pair of impurity diffusedregions intervening a gate insulation film therebetween, the gateelectrode being formed of a first polycrystalline silicon film formed onthe gate insulation film, a second polycrystalline silicon film formedon the first polycrystalline silicon film and having crystal grainboundaries which are discontinuous to the first polycrystalline siliconfilm, a metal nitride film formed on the second polycrystalline siliconfilm, and a metal film form on the metal nitride film.

[0037] In the above-described semiconductor device, it is possible thata native oxide film is formed between the first polycrystalline siliconfilm and the second polycrystalline silicon film.

[0038] In the above-described semiconductor device, it is possible thatthe first polycrystalline silicon film is doped with boron.

[0039] In the above-described semiconductor device, it is possible thatthe first polycrystalline silicon film and the second polycrystallinesilicon film are doped with boron, a boron concentration in the firstpolycrystalline silicon film near an interface between the firstpolycrystalline silicon film and the second polycrystalline silicon filmis higher than a boron concentration in the second polycrystallinesilicon film near the interface between the first polycrystallinesilicon film and the second polycrystalline silicon film.

[0040] In the above-described semiconductor device, it is possible thata crystal grain size of the first polycrystalline silicon film issmaller than a crystal grain size of the second polycrystalline siliconfilm.

[0041] The above-described object is also attained by a method forfabricating a semiconductor device comprising the steps of: forming agate insulation film on a silicon substrate; forming a first siliconfilm doped with boron on the gate insulation film; forming a secondsilicon film on the first silicon film; forming a metal nitride film onthe second silicon film; forming a metal film on the metal nitride film;and patterning a layered structure of the first silicon film, the secondsilicon film, the metal nitride film and the metal film to form a gateelectrode of the layered structure.

[0042] In the above-described method for fabricating a semiconductordevice, it is possible that the step of forming the first silicon filmincludes the step of forming a polycrystalline silicon film on the gateinsulation film and the step of doping boron in the polycrystallinesilicon film.

[0043] In the above-described method for fabricating a semiconductordevice, it is possible that the method further comprises between thestep of forming the polycrystalline silicon film and the step of dopingboron, the step of amorphizing the surface of the polycrystallinesilicon film.

[0044] In the above-described method for fabricating a semiconductordevice, it is possible that the step of forming the first silicon filmincludes the step of forming an amorphous silicon film on the gateinsulation film and the step of doping boron in the amorphous siliconfilm.

[0045] In the above-described method for fabricating a semiconductordevice, it is possible that in the step of forming the second siliconfilm, the second silicon film is formed on the first silicon filmintervening a native oxide film therebetween.

[0046] In the above-described method for fabricating a semiconductordevice, it is possible that the method further comprises between thestep of forming the first silicon film and the step of forming thesecond silicon film, the step of thermal processing to activate theboron doped in the first silicon film.

[0047] In the above-described method for fabricating a semiconductordevice, it is possible that in the step of forming the second siliconfilm, the second silicon film is formed in a 2-20 nm-thick.

BRIEF DESCRIPTION OF THE DRAWINGS

[0048]FIG. 1 is a graph of boron distributions in the gate electrodes ofthe semiconductor device according to the present invention and theconventional semiconductor device (Part 1).

[0049]FIG. 2 is a graph of boron distributions in the gate electrodes ofthe semiconductor device according to the present invention and theconventional semiconductor device (Part 2).

[0050]FIG. 3 is a graph of results of C-V measurement of thesemiconductor device according to the present invention and theconventional semiconductor device.

[0051]FIG. 4 is a graph of Id-Vg characteristics of PMOSFETs of thesemiconductor device according to the present invention and the PMOSFETof the conventional semiconductor device.

[0052]FIG. 5 is a diagrammatic sectional view of the semiconductordevice according to a first embodiment of the present invention, whichshows a structure thereof.

[0053] FIGS. 6A-6D are sectional views of the semiconductor deviceaccording to the first embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 1).

[0054] FIGS. 7A-7C are sectional views of the semiconductor deviceaccording to the first embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 2).

[0055]FIGS. 8A and 8B are sectional views of the semiconductor deviceaccording to the first embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 3).

[0056]FIGS. 9A and 9B are sectional views of the semiconductor deviceaccording to the first embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 4).

[0057] FIGS. 10A-10D are sectional views of the semiconductor deviceaccording to a second embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 1).

[0058] FIGS. 11A-11C are sectional views of the semiconductor deviceaccording to the second embodiment in the steps of the method forfabricating the semiconductor device, which show the method (Part 2).

[0059]FIG. 12 is a diagrammatic sectional view of the conventionalsemiconductor device, which shows the structure thereof.

[0060]FIG. 13 is a graph of a boron distribution in the gate electrodeof the conventional semiconductor device.

[0061]FIG. 14 is a graph of bonding states of boron in the gateelectrode of the conventional semiconductor device.

DETAILED DESCRIPTION OF THE INVENTION

[0062] [A First Embodiment]

[0063] The semiconductor device according to a first embodiment of thepresent invention and the method for fabricating the semiconductordevice will be explained with reference to FIGS. 5, 6A-6D, 7A-7C, 8A-8Band 9A-9B.

[0064] First, a structure of the semiconductor device according to thepresent embodiment will be explained with reference to FIG. 5.

[0065] A gate electrode 26 is formed on a silicon substrate 10intervening a gate insulation film 12 therebetween. The gate electrode26 has a layered structure of polycrystalline silicon films 16, 30formed on the gate insulation film 12, a WN film 20 formed on thepolycrystalline silicon film 30, and a W film 22 formed on the WN film20. The WN film 20 is a barrier metal for preventing the polycrystallinesilicon film 30 and the W film 22 from reacting with each other tothereby form tungsten silicide of high resistance. A cap film of asilicon nitride film 24 is formed on the gate electrode 26. A siliconoxide film 28 for removing damage in patterning the gate electrode 26 isformed on the side walls of the polycrystalline silicon films 16, 30. Asidewall insulation film 34 is formed on the side walls of the gateelectrode 26 and the silicon nitride film 24. A source/drain diffusedlayer 38 including a dopant diffused region 32 and a dopant diffusedregion 36 is formed in the silicon substrate 10 on both sides of thegate electrode 26.

[0066] The semiconductor device according to the present embodiment ischaracterized in that the polycrystalline silicon film formed on thegate insulation film 12 is formed of the polycrystalline silicon film 16which is thicker and the polycrystalline silicon film 30 which isthinner, and the crystal grain boundaries of the polycrystalline siliconfilm 16 are not continuous to those of the polycrystalline silicon film30. The discontinuity between the crystal grain boundaries of thepolycrystalline silicon film 16 and the polycrystalline silicon film 30is due to different thermal processing steps for the films. Suchdifference in the crystal grain diameter can be confirmed, e.g., by thecross-sectional observation by a transmission electron microscope (TEM),the boron concentration distribution measurement by SIMS or others.

[0067] The semiconductor device according to the present embodiment willbe detailed along the method for fabricating the semiconductor deviceaccording to the present embodiment.

[0068] First, the gate insulation film 12 of a 4 nm-thick silicon oxidefilm containing nitrogen by about some % is formed on a siliconsubstrate 10 by, e.g., thermal oxidation (FIG. 6A).

[0069] Then, the amorphous silicon film 14 of a 70 nm-thick is formedby, e.g., CVD method on the silicon substrate 10 with the gateinsulation film 12 formed on.

[0070] Then, boron ions as an acceptor impurity are implanted into theamorphous silicon film 14 by ion implantation (FIG. 6C). Boron ions areimplanted, e.g., with 5 keV acceleration energy and at a 2×10¹⁵ cm dose.Boron is implanted in the amorphous silicon film 14, and the channelingof the implanted ions is suppressed. In place of depositing thenon-doped amorphous silicon film 14 and then implanting boron, theamorphous silicon film 14 doped with boron may be deposited.

[0071] Then, thermal processing, e.g., in a nitrogen atmosphere, at 800°C. and for 30 minutes follows. This thermal processing is forcrystallizing the amorphous silicon film 14 to activate the implantedboron while diffusing the implanted boron sufficiently near the gateinsulation film 12. This thermal processing lower a boron concentrationnear the WN film 12, which will be deposited later, and boron which willtransit toward the WN film 20 can be decreased. In the followingexplanation, the crystallized amorphous silicon film 14 is called thepolycrystalline silicon film 16.

[0072] Next, the amorphous silicon film 18 is formed in a 10 nm-thick onthe polycrystalline silicon film 16 by, e.g., CVD method (FIG. 6D). Atthis time, native oxide films (not shown) are formed between thepolycrystalline silicon film 16 and the amorphous silicon film 18.

[0073] Then, the WN film 20 is deposited in a 5 nm-thick on theamorphous silicon film 18 by, e.g., sputtering method.

[0074] A higher boron concentration is preferable between the amorphoussilicon film 18 and the WN film 20 in consideration of contactresistance between the amorphous silicon film 18 and the WN film 20.From this viewpoint, boron may be implanted into the amorphous siliconfilm 18 after the amorphous silicon film 18 has been deposited andbefore the WN film 20 is deposited, if necessary.

[0075] Then, the W film 22 is formed in a 40 nm-thick on the WN film 20by, e.g., sputtering method. Then, the silicon nitride film 24 is formedin a 100 nm-thick on the W film 22 by, e.g., CVD method. At this time,the thermal processing in the film forming process crystallizes theamorphous silicon film 18 to be the polycrystalline silicon 30 (FIG.7B).

[0076] The boron in the polycrystalline silicon film 16 is thermallydiffused in this step and the following thermal processing steps, butthe diffusion of the boron from the polycrystalline silicon film 16toward the polycrystalline silicon film 30 is suppressed by the nativeoxide films (not shown) formed between the polycrystalline silicon film16 and the polycrystalline silicon film 30. As a result, a boronconcentration in the polycrystalline silicon film 16 near the interfacebetween the polycrystalline silicon film 16 and the polycrystallinesilicon film 30 is higher than that in the polycrystalline silicon filmnear the interface, whereby the boron absorption of the WN film 20 isreduced, and a boron concentration in the polycrystalline silicon film16 can made higher (see FIG. 1).

[0077] Then, the silicon nitride film 24, the W film 22, the WN film 20,the polycrystalline silicon film 30 and the polycrystalline silicon film16 are patterned by the usual lithography and etching to form the gateelectrode 26 of the polymetal structure which is formed of the layerfilm of the polycrystalline silicon films 16, 30, the WN film 20 and theW film 22 having the upper surface covered with the silicon nitride film24 (FIG. 7C).

[0078] Then, thermal process is performed, e.g., in an atmospherecontaining hydrogen and steam, at 800° C. and for 60 minutes toselectively oxidize the side walls alone of the polycrystalline siliconfilms 16, 30 without oxidizing the W film 22 and the WN film 20 tothereby form the silicon oxide film 28. The silicon oxide film 28 is forremoving etching damage caused in the gate insulation film 12 at theedge of the gate electrode 26 in patterning the gate electrode 26 (FIG.8A).

[0079] Next, with the gate electrode 26 as a mask, BF₂ ions areimplanted, e.g., at 5 keV acceleration energy and a 5×10¹⁴ cm⁻² dose toform in the silicon substrate 10 on both sides of the gate electrode 26the impurity diffused layer 32 which is to a low-concentration region ofan LDD structure or a shallow region of an extension source/drainstructure (FIG. 8B).

[0080] Then, a 60 nm-thick silicon nitride film is deposited on theentire surface by, e.g., CVD method and etched back to form the sidewallinsulation film 34 of the silicon nitride film on the side walls of thegate electrode 26 and the silicon nitride film 24 (FIG. 9A).

[0081] Then, with the gate electrode 26 and the sidewall insulation film34 as a mask, boron ions, for example, are implanted at 5 keVacceleration energy and a 2×10¹⁵ cm⁻² to form the impurity diffusedregion 36, which is to be a heavily doped region of an LDD structure ora deep region of an extension source/drain structure.

[0082] Next, in a nitrogen atmosphere thermal processing is performed,e.g., at 950° C. for 10 seconds to activate the boron ions introducedinto the impurity diffused regions 32, 36 to form the source/draindiffused layer 38 (FIG. 9B).

[0083] Thus, the PMOSFET including the gate electrode 26 of thepolymetal structure is formed.

[0084] As describe above, according to the present embodiment, after thepolycrystalline silicon film 16 with boron implanted is formed andbefore the WN film 20 is formed, the amorphous silicon film 18intervenes between the polycrystalline silicon film 16 and the WN film20, whereby the diffusion of the boron from the polycrystalline siliconfilm toward the WN film 20 can be decreased. Thus, 40 with Ge ions, itis preferable that a dose is about 5×10¹⁴ cm⁻² at most. When too much Geis introduced into the polycrystalline silicon film 40, the activationof boron is accelerated by B—Ge bonds in the polycrystalline siliconfilm 40 on the upper side, and the boron concentration is decreased nearthe interface with the gate insulation film 12.

[0085] Next, boron ions as an acceptor impurity are introduced into thepolycrystalline silicon film by ion implantation (FIG. 10D). At thistime, the surface of the polycrystalline silicon film 40 has beenamorphized, and the channeling of the implanted ions is suppressed. Inplace of implanting boron after the non-doped polycrystalline siliconfilm 40 is deposited, the polycrystalline silicon film doped with boronmay be deposited.

[0086] Then, thermal processing is performed, e.g., in a nitrogenatmosphere at 800° C. for 30 minutes. This thermal processing is foractivating the boron implanted in the polycrystalline silicon film 40while sufficiently diffusing the boron up to the vicinity of the gateinsulation film 12. This thermal processing decreases the boronconcentration near a WN film 20 which will be deposited later and candecrease boron which will transit toward the WN film 20. Because thepolycrystalline silicon film 40 is not deposited in the amorphous state,the diffusion of the boron in the polycrystalline silicon film 40 intothe silicon substrate 10 by this thermal processing and later thermalprocessing steps can be suppressed (see FIG. 2).

[0087] Next, a 10 nm-thick amorphous silicon film 18 is formed on thepolycrystalline silicon film 40 by, e.g., CVD method (FIG. 11A). At thistime, native oxide films (not shown) are present between thepolycrystalline silicon film 40 and the amorphous silicon film 18.

[0088] Then, a 5 nm-thick WN film 20 is formed on the amorphous siliconfilm 18 by, e.g., sputtering method.

[0089] Next, a 40 nm-thick W film 22 is formed on the WN film 20 by,e.g., sputtering method.

[0090] Then, a 100 nm-thick silicon nitride film 24 is formed on the Wfilm 22 by, e.g., CVD method. At this time, the amorphous silicon film18 is crystallized by the thermal processing of this film forming stepto be a polycrystalline silicon film 30 (FIG. 11B). In forming thepolycrystalline silicon films 40, 30 by this fabrication method, crystalgrain diameters of the polycrystalline silicon film 40 are smaller thanthose of the polycrystalline silicon film 30.

[0091] Next, in the same way as in the method for fabricating thesemiconductor device according to the first embodiment shown in FIGS. 7Ato 9B, a PMOSFET including a gate electrode 26 of the polymetalstructure of the layer films of the polycrystalline silicon films 40,30, the WN film 20 and the W film 22 (FIG. 11C).

[0092] As described above, according to the present embodiment, afterboron is introduced into the polycrystalline silicon film 40 and beforethe WN film 20 is formed, the amorphous silicon film 18 intervenesbetween the polycrystalline silicon film 40 and the WN film 20, wherebydiffusion of the boron from the polycrystalline silicon film 40 towardthe WN film 20 can be decreased. Thus, the depletion of the gateelectrode 26 can be suppressed.

[0093] Boron is not doped with the amorphous silicon film 14 deposited,but is doped with the polycrystalline silicon film 40 deposited, wherebydiffusion of the boron into the silicon substrate 10 by later thermalprocessing can be suppressed.

[0094] In the present embodiment, WN film is used as the barrier metal.The absorption of the boron by the barrier metal is caused by formationof bonds between the boron with the nitrogen. Accordingly, the presentinvention is applicable to MOSFETs including the barrier metalsconsisting of other nitride materials, e.g., MoN (molybdenum nitride),TiN (titanium nitride), VN (vanadium nitride), CrN (chrome nitride), CuN(copper nitride), FeN (iron nitride), ZnN (zinc nitride), NiN (nickelnitride), etc.

[0095] In the present embodiment, for suppressing diffusion of the borontoward the barrier metal, native oxide films formed between thepolycrystalline silicon film and the amorphous silicon film are used. Inaddition to the use of the native oxide film, a step of positivelyoxidizing the surface of the polycrystalline silicon film after thepolycrystalline silicon film is formed and before the amorphous siliconfilm is formed may be provided. A thin silicon oxide film of a filmthickness equal to the native oxide films can be formed by, e.g., liquidchemical treatment, as of hydrochloric acid, or rapid thermal oxidation.

[0096] In the present embodiment, Ge ions are used for pre-amorphizingthe polycrystalline silicon film, but Ge ions are not essential. Forexample, ions of IV Group, such as Ge (germanium), Si, Sn (tin), ions ofIII Group, such as Ga (gallium), In (indium), etc., ions of inactivegases, such as Ar (argon), Kr (krypton), and ions of halogen group, suchas I (iodine), Cl (chlorine), Br (bromine), etc. can be used. Ions of VGroup, which can amorphize the polycrystalline silicon film byrelatively low dosage, such as As (arsenic), Sb (antimony), etc., can bealso used.

[0097] As described above, according to the present invention, afterboron is implanted in the amorphous silicon film or the polycrystallinesilicon film, and before the barrier metal of a metal consisting of anitride is formed, the silicon film intervenes between the film and thebarrier metal, whereby diffusion of the boron from the lowerpolycrystalline silicon film toward the barrier metal can be decreased.Thus, depletion of the gate electrode can be suppressed.

[0098] In forming the lower polycrystalline silicon film, an amorphoussilicon film is not deposited, but a polycrystalline silicon film isdeposited, and boron is doped into the polycrystalline silicon film,whereby diffusion of the boron toward the silicon substrate by laterthermal processing can be suppressed.

What is claimed is:
 1. A semiconductor device comprising: a pair ofimpurity diffused regions formed in a silicon substrate, spaced fromeach other; and a gate electrode formed above the silicon substratebetween the pair of impurity diffused regions intervening a gateinsulation film therebetween, the gate electrode being formed of a firstpolycrystalline silicon film formed on the gate insulation film, asecond polycrystalline silicon film formed on the first polycrystallinesilicon film and having crystal grain boundaries which are discontinuousto the first polycrystalline silicon film, and a metal nitride filmformed on the second polycrystalline silicon film.
 2. A semiconductordevice comprising: a pair of impurity diffused regions formed in asilicon substrate, spaced from each other; and a gate electrode formedabove the silicon substrate between the pair of impurity diffusedregions intervening a gate insulation film therebetween, the gateelectrode being formed of a first polycrystalline silicon film formed onthe gate insulation film, a second polycrystalline silicon film formedon the first polycrystalline silicon film and having crystal grainboundaries which are discontinuous to the first polycrystalline siliconfilm, a metal nitride film formed on the second polycrystalline siliconfilm, and a metal film form on the metal nitride film.
 3. Asemiconductor device according to claim 1, wherein a native oxide filmis formed between the first polycrystalline silicon film and the secondpolycrystalline silicon film.
 4. A semiconductor device according toclaim 2, wherein a native oxide film is formed between the firstpolycrystalline silicon film and the second polycrystalline siliconfilm.
 5. A semiconductor device according to claim 1, wherein the firstpolycrystalline silicon film is doped with boron.
 6. A semiconductordevice according to claim 2, wherein the first polycrystalline siliconfilm is doped with boron.
 7. A semiconductor device according to claim1, wherein the first polycrystalline silicon film and the secondpolycrystalline silicon film are doped with boron, a boron concentrationin the first polycrystalline silicon film near an interface between thefirst polycrystalline silicon
 11. A method for fabricating asemiconductor device comprising the steps of: forming a gate insulationfilm on a silicon substrate; forming a first silicon film doped withboron on the gate insulation film; forming a second silicon film on thefirst silicon film; forming a metal nitride film on the second siliconfilm; forming a metal film on the metal nitride film; and patterning alayered structure of the first silicon film, the second silicon film,the metal nitride film and the metal film to form a gate electrode ofthe layered structure.
 12. A method for fabricating a semiconductordevice according to claim 11, wherein the step of forming the firstsilicon film includes the step of forming a polycrystalline silicon filmon the gate insulation film and the step of doping boron in thepolycrystalline silicon film.
 13. A method for fabricating asemiconductor device according to claim 12, further comprising betweenthe step of forming the polycrystalline silicon film and the step ofdoping boron, the step of amorphizing the surface of the polycrystallinesilicon film.
 14. A method for fabricating a semiconductor deviceaccording to claim 11, wherein the step of forming the first siliconfilm includes the step of forming an amorphous silicon film on the gateinsulation film and the step of doping boron in the amorphous siliconfilm.
 15. A method for fabricating a semiconductor device according toclaim 11, wherein in the step of forming the second silicon film, thesecond silicon film is formed on the first silicon film intervening anative oxide film therebetween.
 16. A method for fabricating asemiconductor device according to claim 11, further comprising betweenthe step of forming the first silicon film and the step of forming thesecond silicon film, the step of thermal processing to activate theboron doped in the first silicon film.
 17. A method for fabricating asemiconductor device according to claim 11, wherein in the step offorming the second silicon film, the second silicon film is formed in a2-20 nm-thick.